The present invention relates generally to memory devices, and more particularly to accessing memory devices.
It is well known that memory devices operate by selecting a particular memory cell to determine a charge state stored on the memory cell. The charge state stored on the memory cell is detected by a sense amplifier that translates the stored charge into a data value.
Existing memory devices typically use static circuitry to select specific bit lines to be charged, thereby permitting memory cell charge state detection during a sensing portion of the memory access.
With flash memory devices, typically several transistors are used to precharge a selected bitline to enable sensing the state of a selected memory cell. At least one of those transistors has the function of limiting the bitline voltage level to a predetermined level which allows sensing the bit cell""s state reliably. The transistor used to enable the precharge of a bit line is typically a high gain device which is costly in terms of silicon real estate. In addition, the transistor that enables precharge of the bit line can serve to isolate the low voltage sensing circuitry from the high voltages that can be applied to the bitline during program or erase operations. Because of the high voltage isolation characteristics, the transistor is generally required to be a thick oxide device, which causes it to be especially large. Because memory density is governed by an ability to maintain small device sizes, the use of a high voltage, high gain device to support the column select results in a reduced array efficiency in terms of bit cell area relative to overall device size.
Therefore, it will be appreciated that alternate memory devices reducing the size and complexity of devices needed to perform the precharge and decode functions would be useful.